High Speed Interface

Column Write

Bit Lines

Word Lines

(0,0)

(359, 639)

SRAM

Control

Row

Voltage

Generators

Misc

Column Read

Control

Control

Low Speed Interface

Voltages

illumination

Details omitted for clarity.

Orientation is not representative of optical system.

Scale is not representative of layout.

For informational purposes only.

17

DLP2000

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DLPS078 – JULY 2017

Product Folder Links: DLP2000

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Copyright © 2017, Texas Instruments Incorporated

7 Detailed Description

7.1 Overview

The DLP2000 is a 0.2-inch diagonal spatial light modulator of aluminum micromirrors. Pixel array size is 640

columns by 360 rows in a square grid pixel arrangement. The DMD is an electrical input, optical output micro-

electrical-mechanical system (MEMS). The electrical interface is a Double Data Rate (DDR) input data bus.

The DLP2000 is part of the chipset that includes the DLP2000 DMD, the DLPC2607 display controller, and the

DLPA1000 PMIC/LED driver. To ensure optimal performance, the DLP2000 DMD should be used with the

DLPC2607 display controller and the DLPA1000 PMIC/LED driver.

7.2 Functional Block Diagram