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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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LP5569RTWR 데이터시트(PDF) 62 Page - Texas Instruments |
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LP5569RTWR 데이터시트(HTML) 62 Page - Texas Instruments |
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62 / 86 page  62 LP5569 SNVSAP8 – JULY 2017 www.ti.com Product Folder Links: LP5569 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 8.6.1.49 ENGINE3_PROG_START Register (Address = 4Dh) [reset = 0h] ENGINE3_PROG_START is shown in Figure 68 and described in Table 63. Return to Summary Table. Figure 68. ENGINE3_PROG_START Register 7 6 5 4 3 2 1 0 prog_start_addr3 R/W-0h Table 63. ENGINE3_PROG_START Register Field Descriptions Bit Field Type Reset Description 7–0 prog_start_addr3 R/W 0h Engine 3 program start address. 8.6.1.50 PROG_MEM_PAGE_SELECT Register (Address = 4Fh) [reset = 0h] PROG_MEM_PAGE_SELECT is shown in Figure 69 and described in Table 64. Return to Summary Table. SRAM page select. SRAM is 256 × 16 addressable from I2C, and is viewed as 16 pages of 32 bytes. This register selects which page is being accessed, serving as the upper bits of the SRAM address. The I2C host must write this register during the course of loading SRAM contents in order to access the next page. Figure 69. PROG_MEM_PAGE_SELECT Register 7 6 5 4 3 2 1 0 RESERVED page_sel R/W-0h R/W-0h Table 64. PROG_MEM_PAGE_SELECT Register Field Descriptions Bit Field Type Reset Description 7–4 RESERVED R/W 0h 3–0 page_sel R/W 0h 0000 = page 0 (lowest 32 bytes) 0001 = page 1 (bytes 32-63) ... 1111 = page 15 (highest 32 bytes) 8.6.1.51 PROGRAM_MEM_00 Register (Address = 50h) [reset = 0h] PROGRAM_MEM_00 is shown in Figure 70 and described in Table 65. Return to Summary Table. Figure 70. PROGRAM_MEM_00 Register 7 6 5 4 3 2 1 0 cmd00_msb R/W-0h Table 65. PROGRAM_MEM_00 Register Field Descriptions Bit Field Type Reset Description 7–0 cmd00_msb R/W 0h Program memory data 8.6.1.52 PROGRAM_MEM_01 Register (Address = 51h) [reset = 0h] PROGRAM_MEM_01 is shown in Figure 71 and described in Table 66. Return to Summary Table. |
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