WM8980 datasheet(53/81 Pages) WOLFSON

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WM8980

PP Rev 1.6 January 2005

VIDEO BUFFER

DESCRIPTION

The WM8980 incorporates a current mode output video buffer capable of operating from a 2.5V

supply, with an input 3

rd order Low Pass Filter (LPF) and clamp. The gain through this buffer can be

programmed as 0dB or 6dB via the control interface. The current mode output means that the signal

swing seen at the output of the buffer will be the same as that at the connection to the receiving

equipment (e.g. a TV). Note that the input to the receiver should be AC coupled and terminated to

Ω, as is standard, for best performance.

Figure 23 Video Buffer

The input clamp should be enabled when using AC coupling at the input to the video buffer, using

the VBCLAMPEN register bit.

Care should be taken with PCB layout, designing for at least 1GHz frequencies to avoid degrading

performance. Vias and sharp corners should be avoided and parasitic capacitance minimised on

signal paths, which should be kept as short and straight as possible. The VBVDD supply should be

decoupled as close to the pin as possible. See the “External Components” section for more

information.

LOW PASS FILTER

A low pass filter is integrated at the video buffer input, which is intended to remove images in the

video DAC output waveform at multiples of the DAC clock frequency. A 3

rd order Butterworth filter is

used, with the following characteristics:

VIDEO BUFFER REGISTERS

Video buffer enable / disable and gain are controlled via the following registers:

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

Power management

VBUFEN

Video buffer enable

0 = enabled

1 = disabled

VBGAIN

Video buffer gain

0 = 0dB

1 = +6dB

R40

Video Buffer

VBCLAMPEN

Video buffer clamp enable

0 = disabled

1 = enabled

Table 44 Video Buffer Registers

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