| 전자부품 데이터시트 검색엔진 |
|
CS61884 데이터시트(PDF) 57 Page - Cirrus Logic |
|
|
|||||||||||||||||||||||||||||
CS61884 데이터시트(HTML) 57 Page - Cirrus Logic |
|
57 / 72 page ![]() CS61884 DS485PP4 57 19.6 Jitter Attenuator Characteristics (TA = -40 °Cto85°C; TV+, RV+ = 3.3 V ±5%; GND = 0 V) Notes: 18. Attenuation measured with sinusoidal input filter equal to 3/4 of measured jitter tolerance. Circuit attenuates jitter at 20 dB/decade above the corner frequency. Output jitter can increase significantly when more than 28 UI’s are input to the attenuator. 19. Measurement is not effected by the position of the Jitter Attenuator. Parameter Min. Typ Max Units Jitter Attenuator Corner Frequency T1/J1 Modes Note 11, 19 T1/J1 Modes E1 Modes (Depends on JACF Bit in host mode) E1 Modes - - - - 3.78 7.56 1.25 2.50 - - - - Hz E1 Jitter Attenuation 3 Hz to 40 Hz Note 11, 18 400 Hz to 100 kHz +0.5 - 19.5 - - - - dB T1/J1 Jitter Attenuation 1 Hz to 20 Hz 1kHz Note 11, 18 1.4KHz to 100KHz 0 - 33.3 -40 - - - - - - dB Attenuator Input Jitter Tolerance before FIFO 32-bit FIFO over flow and under flow Note 11 64-bit FIFO - - 24 56 - - UI UI Delay through Jitter Attenuator Only 32-bit FIFO Note 11 64-bit FIFO - - 16 32 - - UI UI Intrinsic Jitter in Remote Loopback Notes 11, 17 -- 0.11 UI |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |