TAS5755MDFDR datasheet(63/76 Pages) TI1

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AVDD/DVDD

PDN

PVDD

RESET

T0420-05

I C

2ms

0ns

TAS5755M

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SLOS982 – AUGUST 2017

Product Folder Links: TAS5755M

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Figure 70. Power-Loss Sequence

10.2.1.2.4.1

Initialization Sequence

Use the following sequence to power up and initialize the device:

Hold all digital inputs low and ramp up AVDD/DVDD to at least 3 V.

Initialize digital inputs and PVDD supply as follows:

•

Drive RESET = 0, PDN = 1, and other digital inputs to their desired state while ensuring that

all are never more than 2.5 V above AVDD/DVDD. Wait at least 100 µs, drive RESET = 1,

and wait at least another 13.5 ms.

•

Ramp up PVDD to at least 8 V while ensuring that it remains below 6 V for at least 100 µs

after AVDD/DVDD reaches 3 V. Then wait at least another 10 µs.

Trim oscillator (write 0x00 to register 0x1B) and wait at least 50 ms.

Configure the DAP via I2C, see TAS5755EVM Evaluation Module User's Guide (SLOU481) for

typical values.

Configure remaining registers.

Exit shutdown (sequence defined in Shutdown Sequence).

10.2.1.2.4.2

Normal Operation

The following are the only events supported during normal operation:

Writes to master/channel volume registers

Writes to soft-mute register

Enter and exit shutdown (sequence defined in Shutdown Sequence)

NOTE

Event 3 is not supported for 240 ms + 1.3 × tstart after trim following AVDD/DVDD power-

up ramp (where tstart is specified by register 0x1A).

TAS5755MDFDR 데이터시트(PDF) 63 Page - Texas Instruments