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DS31256 데이터시트(PDF) 89 Page - Maxim Integrated Products

부품명 DS31256
상세설명  256-Channel, High-Throughput HDLC Controller
PDF  183 Pages
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제조업체  MAXIM [Maxim Integrated Products]
홈페이지  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS31256 데이터시트(HTML) 89 Page - Maxim Integrated Products

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DS31256 256-Channel, High-Throughput HDLC Controller
89 of 183
Figure 9-2. Receive DMA Memory Organization
Free Data Buffer Space
Receive Free-Queue Descriptors:
Contains 32-Bit Addresses for Free Data
Buffers and their Associated
Free Packet Descriptors
Free-Queue Base Address (32)
Free-Queue End Address (16)
Free-Queue Small Buffer Start Address (16)
Free-Queue Large Buffer Host Write Pointer (16)
Free-Queue Large Buffer DMA Read Pointer (16)
Free-Queue Small Buffer DMA Read Pointer (16)
Free-Queue Small Buffer Host Write Pointer (16)
Up to 64k Dual dwords
Free-Queue Descriptors Allowed
Receive Done-Queue Descriptors:
Contains Index Pointers to
Used Packet Descriptors
Done-Queue Base Address (32)
Done-Queue End Address (16)
Done-Queue DMA Write Pointer (16)
Done-Queue Host Read Pointer (16)
Upto64kdwordsDone-Queue
Descriptors Allowed
Receive Packet Descriptors:
Contains 32-Bit Addresses
to Free Buffer as well as
Status/Control Information and
Links to Other Packet Descriptors
Descriptor Base Address (32)
Up to 64k Quad dwords
Descriptors Allowed
Used Data Buffer Space
Main Off-Board Memory
(32-Bit Address Space)
Internal Registers



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