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DS31256 데이터시트(PDF) 10 Page - Maxim Integrated Products |
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DS31256 데이터시트(HTML) 10 Page - Maxim Integrated Products |
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10 / 183 page ![]() DS31256 256-Channel, High-Throughput HDLC Controller 10 of 183 Figure 2-1. Block Diagram RC2 RD2 RS2 TC2 TD2 TS2 JTDO PCLK PAD[31:0] PRST PCBE[3:0] PPAR PFRAME PIRDY PTRDY PSTOP PIDSEL PDEVSEL PREQ PGNT PPERR PSERR RC15 RD15 RS15 TC15 TD15 TS15 RC0 RD0 RS0 TC0 TD0 TS0 RC1 RD1 RS1 TC1 TD1 TS1 PXAS PXDS PXBLAST JTRST JTDI JTMS JTCLK LA[19:0] LD[15:0] LWR (LR/W) LRD (LDS) LIM LINT LRDY LMS LCS LHOLD ( LBR) LHLDA ( LBG) LBGACK LCLK Pin Names in ( ) are active when the device is in the MOT mode (i.e., LIM = 1) LBHE JTAG Test Access (Sec. 12) Local Bus Block (Sec. 11) Layer One Block (Sec. 6) HDLC Block (Sec. 7) FIFO Block (Sec. 8) DMA Block (Sec. 9) PCI Block (Sec. 10) BERT (Sec. 6.5) RECEIVE DIRECTION TRANSMIT DIRECTION Dallas Semiconductor DS31256 |
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