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DSP56166ROM 데이터시트(PDF) 41 Page - Motorola, Inc |
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DSP56166ROM 데이터시트(HTML) 41 Page - Motorola, Inc |
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41 / 63 page ![]() PRELIMINARY - 6/15/93 31 DSP56166 Technical Data Sheet MOTOROLA AC Electrical Characteristics — Bus Arbitration Timing — Master Mode VCC = 5.0 Vdc +/- 10%, TJ = -40 to +125˚ C, CL = 50 pF + 1 TTL Load. NOTES: 1. With no external access from the DSP56166 2. During external read or write access 3. During external read-modify-write access 4. During STOP mode — external bus is released and BG is always low 5. During WAIT mode Num Characteristic 60MHz Unit Min Max 85 CLKO high to BR Output Valid 7.3 ns 86 BG Input Valid to CLKO Low (Setup) 1.7 — ns 87 CLKO Low to BG Input Deassertion (Hold) TBD — ns 88 BB Input Deassertion to CLKO Low (Setup) 1.5 — ns 89 CLKO Low to BB Input Deassertion (Hold) TBD — ns 90 CLKO High to BB Output Assertion 8.0 ns 91 CLKO Low to BG Input Assertion (See note 1) (See note 2) TBD TBD — — ns ns 92 BG Deassertion to BB Deassertion (See note 1) (See note 2) (See note 3) (See note 4) (See note 5) TBD TBD TBD TBD TBD ns ns ns ns ns 93 BG Deassertion to Addr/Data/Control (See note 1) Three-state (See note 2) (See note 3) (See note 4) (See note 5) TBD TBD TBD TBD TBD ns ns ns ns ns |
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