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SLG46121V 데이터시트(PDF) 25 Page - Dialog Semiconductor |
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SLG46121V 데이터시트(HTML) 25 Page - Dialog Semiconductor |
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25 / 98 page ![]() 000-0046121--106 Page 24 of 97 SLG46121 7.7 PIN 12 Register Settings Table 14. PIN 12 Register Settings Signal Function Register Bit Address Register Definition PIN 12 Mode Control reg <685:683> 000: Digital Input without Schmitt Trigger 001: Digital Input with Schmitt Trigger 010: Low Voltage Digital Input 011: Reserved 100: Push Pull 101: Open Drain NMOS 110: Open Drain NMOS 111: Open Drain NMOS PIN 12 Pull Up/Down Resistor Value Selection reg <687:686> 00: Floating 01: 10 k Resistor 10: 100 k Resistor 11: 1 M Resistor PIN 12 Pull Up/Down Resistor Selection reg <688> 0: Pull Down Resistor 1: Pull Up Resistor PIN 12 Driver Strength Selection reg <689> 0: 1X 1: 2X |
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