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BLUENRG-2 데이터시트(PDF) 129 Page - STMicroelectronics |
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BLUENRG-2 데이터시트(HTML) 129 Page - STMicroelectronics |
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129 / 190 page ![]() BlueNRG-2 Functional details DocID030675 Rev 2 129/190 Timer/Counter 2 (TnCNT2) counts down at the rate of the selected clock. Upon every underflow of TnCNT2, the value contained in the TnCRB register is loaded into TnCNT2 and counting proceeds downward from that value. In addition, the TnDPND interrupt- pending flag is set and a timer interrupt 2 is generated if the TnDIEN bit is set. 3.13.2.5 MFT mode 4: input-capture plus timer mode This Mode4 is combination of Mode3 and Mode2. The Timer/Counter1 can be used: As a system counter: to count down at the rate of the selected clock. To generate a 50% duty-cycle clock signal on TnA pin connected to the PWMx pin of the device (TnCNT1 reloaded by TnCRB on underflow). The Timer/Counter2 can be used: As a system counter: to count down at the rate of the selected clock. A transition on input pad connected to TnB pin of the MFT generates a transfer of TnCNT2 register value in TnCRB register. The device input pad selection is done using MFTX_IOSEL register The transition edge to capture has to be defined in TnBEDG bit of the TnMCTRL register. The TnB input can be configured to perform a counter pReset to 0xFFFF upon reception of a valid capture event using TnBEN bit in TnMCTRL register. In figure below the block diagram related to the MFT mode 4. Figure 20: MFT mode 4 block diagram |
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