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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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L9678P 데이터시트(PDF) 92 Page - STMicroelectronics |
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L9678P 데이터시트(HTML) 92 Page - STMicroelectronics |
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92 / 203 page  SPI interface L9678P, L9678P-S 92/203 DocID029274 Rev 3 Bit 15 = 1 FAULTED condition Address: 50 (RSDR0) 51 (RSDR1) Type: R Buffer: $5000 (RSDR0) $5100 (RSDR1) Reset: - Updated based on SPI read request 0000 RSU0 0100 RSU1 DATA[9:0] $000 $000 $000 10-bit data from Manchester decoder Cleared by SSM_RESET or SPI read or when channel is commanded OFF via SPI RSCTRL updated when a valid PSI5 frame is received 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 MOSI - X X X X X X X X X X X X X X X X MISO X 0X X CRC[2:0] 000 000 000 CRC based on bits [16:0] Updated based on bits [16:0] FLT 1 1 1 Fault Status - Depending on Fault Status, the DATA bits are defined differently Cleared when all of the following bits are '0': STG, STB, CURRENT_HI, OPENDET, RSTEMP, NODATA Set when any of the following bits are '1': STG, STB, CURRENT_HI, OPENDET, RSTEMP, NODATA 0 No fault 1 Fault On/Off 0 0 0 Channel On/Off Status Cleared by SSM_RESET or when channel is commanded OFF via SPI RSCTRL or when the STG bit is set or the RSTEMP bit is set Set when channel is commanded ON by SPI RSCTRL 0 Off |
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