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VSC8113 데이터시트(PDF) 8 Page - Vitesse Semiconductor Corporation |
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VSC8113 데이터시트(HTML) 8 Page - Vitesse Semiconductor Corporation |
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8 / 28 page ![]() VITESSE SEMICONDUCTOR CORPORATION Data Sheet VSC8113 ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux with Integrated Clock Generation and Clock Recovery Page 8 © VITESSE SEMICONDUCTOR CORPORATION G52154-0, Rev 4.2 741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 3/19/99 Figure 6: External Integrator Capacitor Clock Recovery The fully monolithic Clock Recovery Unit (CRU) consists of a Phase Detector, a Frequency Detector, a Loop Filter and a Voltage Controlled Oscillator (VCO). The phase detector compares the phase information of the incoming data with the recovered clock. The frequency detector compares the frequency component of the data input with the recovered clock to provide the pull in energy during lock acquisition. The LoopFilter inte- grates the phase information from the phase and frequency detectors and provides the control voltage to the VCO. The CRU provides a lock detect function. If the frequencies of the serial data stream and the CRU’s recov- ered clock are different, a data bit in the serial data stream will occasionally be dropped. If the Frequency Detec- tor does not detect this condition in a moving 1.5 µs window, the CRULOCKDET output is asserted to signal that the CRU is frequency locked to the serial data stream. This output is forced low if it detects that a data bit is dropped or if the recovered clock frequency drifts more than 5% from the CMU’s output frequency. + - CP1 CP2 CN1 CN2 CP = 0.1 µF CN = 0.1 µF |
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