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CYUSB302X 데이터시트(PDF) 18 Page - Cypress Semiconductor |
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CYUSB302X 데이터시트(HTML) 18 Page - Cypress Semiconductor |
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18 / 34 page ![]() Document Number: 001-55190 Rev. *L Page 18 of 34 CYUSB302x I2C Interface Timing I2C Timing Figure 4. I2C Timing Definition Table 10. I2C Timing Parameters[4] Parameter Description Min Max Units I2C Standard Mode Parameters fSCL SCL clock frequency 0 100 kHz tHD:STA Hold time START condition 4 – µs tLOW LOW period of the SCL 4.7 – µs tHIGH HIGH period of the SCL 4 – µs tSU:STA Setup time for a repeated START condition 4.7 – µs tHD:DAT Data hold time 0 – µs tSU:DAT Data setup time 250 – ns tr Rise time of both SDA and SCL signals – 1000 ns tf Fall time of both SDA and SCL signals – 300 ns tSU:STO Setup time for STOP condition 4 – µs tBUF Bus free time between a STOP and START condition 4.7 – µs tVD:DAT Data valid time – 3.45 µs tVD:ACK Data valid ACK – 3.45 µs tSP Pulse width of spikes that must be suppressed by input filter n/a n/a Note 4. All parameters guaranteed by design and validated through characterization. |
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