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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MB91F585ASH 데이터시트(PDF) 2 Page - Cypress Semiconductor |
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MB91F585ASH 데이터시트(HTML) 2 Page - Cypress Semiconductor |
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2 / 176 page  MB91580M/S Series, FR81S 32-bit Microcontroller Datasheet Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Document Number: 002-04665 Rev *A Revised March 29, 2016 MB91F583AMG/AMH/AMJ/AMK/ASG/ASH/ASJ/ASK MB91F584AMG/AMH/AMJ/AMK/ASG/ASH/ASJ/ASK MB91F585AMG/AMH/AMJ/AMK/ASG/ASH/ASJ/ASK This series is a Cypress 32-bit microcontroller for automobile motor control. They use the FR81S CPU that is compatible with the FR family. Features FR81S CPU Core 32-bit RISC, load/store architecture, pipeline 5-stage structure Maximum operating frequency: 128MHz (Source oscillation= 4.0MHz, 32 multiplied ( PLL clock multiplication system) ) General-purpose register: 32 bits × 16 sets 16-bit fixed length instructions (basic instructions), 1 instruction per cycle Instructions appropriate to embedded applications Memory-to-memory transfer instructions Bit manipulation instructions Barrel shift instructions High-level language support instructions Function entry/exit instructions Register content multi-load and store instructions Bit search instructions Logical 1 detection, 0 detection, and change-point detection Branch instructions with delay slot Overhead decrement during branch process Register interlock function Easy assembler writing Built-in multiplier and instruction level support Signed 32-bit multiplication: 5 cycles Signed 16-bit multiplication: 3 cycles Interrupt (PC/PS saving) 6 cycles (16 priority levels) The Harvard architecture allows simultaneous execution of program and data access. Instruction compatibility with the FR family Built-in memory protection function (MPU) Eight protection areas can be specified commonly for instructions and data. Control access privilege in both privilege mode and user mode Built-in FPU (floating-point operation) IEEE754 compliant Floating-point register: 32 bits × 16 sets Peripheral functions Clock generation (SSCG function is available) Main oscillation (4 MHz to 20 MHz) PLL multiplication rate:1 to 32 times CR oscillation Oscillation frequency: 100kHz, with frequency accuracy ± 50% (pre-trimming) Trimming is enabled To be used as a count clock of hardware watchdog Oscillation stop feature during standby is not available MB91F583AMJ/F584AMJ/F585AMJ/F583AMK/F 584AMK/F585AMK MB91F583ASJ/F584ASJ/F585ASJ/F583ASK/F5 84ASK/F585ASK Oscillation stop feature during standby is available MB91F583AMG/F584AMG/F585AMG/F583AMH /F584AMH/F585AMH MB91F583ASG/F584ASG/F585ASG/F583ASH/ F584ASH/F585ASH Built-in program flash memory capacity MB91F583: 256+64 Kbytes MB91F584: 384+64 Kbytes MB91F585: 512+64 Kbytes Built-in data flash (WorkFlash) 64 Kbytes Built-in RAM capacity Main RAM MB91F583: 32 Kbytes MB91F584: 48 Kbytes MB91F585: 48 Kbytes Backup RAM 8 Kbytes General-purpose port: MB91F583AM/F584AM/F585AM 76 ports Including eight I 2C pseudo open drain corresponding ports MB91F583AS/F584AS/F585AS 44ports Including two I 2C pseudo open drain corresponding ports |
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