ST10F166 datasheet(19/62 Pages) STMICROELECTRONICS

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ST10F166

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Interrupt System (Cont’d)

Except when another higher prioritized trap service being in progress, a hardware

trap will interrupt any actual program execution. In turn, hardware trap services can

normally not be interrupted by standard or PEC interrupts.

The following table shows all of the possible exceptions or error conditions that can

arise during run-time:

Table 4. Exceptions and Errors during Runtime

Exception Condition

Trap

Flag

Trap

Vector

Location

Trap

Number

Trap

priority

Reset Functions:

Hardware Reset

Software Reset

Watchdog Timer Overflow

RESET

III

Class A Hardware Traps:

Non-Maskable Interrupt

Stack Overflow

Stack Underflow

NMI

STKOF

STKUF

NMITRAP

STOP-

TRAP

STUTRAP

08h

10h

18h

Class B Hardware Traps:

Undefined Opcode

Protected Instruction Fault

Illegal Word Operand Access

Illegal Instruction Access

Illegal External Bus Access

UNDOPC

PRTFLT

ILLOPA

ILLINA

ILLBUS

BTRAP

28h

Reserved

[2Ch - 3Ch]

[Bh - Fh]

Software Traps

TRAP Instruction

Any

[0h - 1FCh]

in steps

of 4h

Any

[0h - 7Fh]

Current

CPU Pri-

ority

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