NCV7728

www.onsemi.com

16

OCS

“01”

ULD

“10”

Output Enabled

“11”

Output Disabled

“00”

(default)

HBENx= ‘0’ or

Power On Reset

SRR = ‘1’ or

Power On Reset

Over

Current

Under

Load

HBENx= ‘1’

Figure 14. SO HBx[1:0] Priority Encoding State Diagram

As seen from Figure 14 an over current event following an

under load condition on the same half-bridge reports HBx =

‘10’ then HBx = ‘01’. However, an over current preceding

an under load fault only reports HBx = ‘01’ since there are

no direct path from the OCS state to the ULD state. Thus an

over current shutdown fault must be cleared before an under

load fault is reported on the same half-bridge.

HBx[1:0] bits are priority encoded to provide the status

information of each of the half−bridge outputs. Thus an over

current shutdown fault must be cleared before an under load

fault is reported on the same half−bridge. The latched

thermal shutdown (TSD) information is available on SO

after CSB goes low until the first rising SCLK edge. The

following procedures must be met for a true TSD reading:

1. SCLK and SI are low before the CSB cycle. Violating these conditions will results in an undetermined SPI behavior

or/and an incorrect TSD reading.

2. CSB transitioning from high to low.

3. CSB setup time (TcsbSup) is satisfied and the data is captured before the first SCLK rising edge.