6

Integrated

Circuit

Systems, Inc.

ICS9DB106

Preliminary Product Preview

0833A—07/26/04

SMBusTable: Device Control Register, READ/WRITE ADDRESS (DC/DD)

Pin #

Name

Control Function Type0

1

PWD

Bit 7

SW_EN

Enables SMBus

Control

RW

PLL controlled

by SMBus

registers

PLL controlled

by device pins

1

Bit 6

RW

X

Bit 5

RW

X

Bit 4

RW

X

Bit 3

RW

X

Bit 2

RW

X

Bit 1

PLL BW #adjust

Selects PLL

Bandwidth

RW

Low BW

High BW

1

Bit 0

PLL Enable

Bypasses PLL for

board test

RW

PLL bypassed

(fan out mode)

PLL enabled

(ZDB mode)

1

SMBusTable: Output Enable Register

Pin #

Name

Control Function Type0

1

PWD

Bit 7

RW

X

Bit 6

RW

X

Bit 5

PCIEX5

Output Control

RW

Disable

Enable

1

Bit 4

RW

X

Bit 3

PCIEX3

Output Control

RW

Disable

Enable

1

Bit 2

PCIEX2

Output Control

RW

Disable

Enable

1

Bit 1

RW

X

Bit 0

PCIEX0

Output Control

RW

Disable

Enable

1

SMBusTable: Function Select Register

Pin #

Name

Control Function Type0

1

PWD

Bit 7

RW

X

Bit 6

RW

X

Bit 5

RW

X

Bit 4

RW

X

Bit 3

RW

X

Bit 2

RW

X

Bit 1

RW

X

Bit 0

RW

X

RESERVED

-

RESERVED

-

-

RESERVED

-

RESERVED

-

RESERVED

RESERVED

-

RESERVED

Byte 0

-

-

RESERVED

-

RESERVED

-

-

RESERVED

-

-

-

RESERVED

-

-

-

Byte 1

-

-

24,23

-

18,17

11,12

-

5,6

Byte 2

-

-

-

-

-

--

-

RESERVED

-

RESERVED

-

RESERVED

-

RESERVED

-

RESERVED

-

RESERVED

-