OL2385SWUG datasheet(3/64 Pages) NXP

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NXP Semiconductors

OL2385SWUG

SIGFOX software driver

OL2385SWUG

All information provided in this document is subject to legal disclaimers.

User guide

Rev. 2.1 — 6 April 2018

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Figure 1. SIGFOX Network Architecture

• Operators operate their SIGFOX networks (base stations and backend system).

• Integrators build end-user systems or modules that will have manufacturer's

transceivers on them with a SIGFOX protocol stack inside.

• End customers buy and use these systems or modules that include SIGFOX

transceivers. each end customer will also have to buy a subscription to SIGFOX

technology from an operator.

4 External/User interfaces to OL2385

4.1 Host MCU interface through SPI

A 5-wire SPI connection is defined between OL2385 board and Host microcontroller

where host is configured to be the Master and always provides the clock. OL2385 is

initiated in Pseudo-Slave mode. The five essential lines required for such interface is

shown in Figure 2.

Reason for extra pin Ack

The host microcontroller can be sometimes faster than the slave device and can send the

data while slave is not yet ready to receive. This might result in communication error due

to nonsynchronization. For example, at slave device few initial clocks could be missed

from the host, because it was not ready to receive. Therefore, each of the frame transfers

between host and OL2385 is completely controlled via a software driven chip select

CS and Ack pins. The protocol and timing diagram makes sure that the handshake is

properly done and none of the bytes are missed, as shown in the following sections.

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