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AD9544/PCBZ 데이터시트(PDF) 50 Page - Analog Devices

부품명 AD9544/PCBZ
상세설명  Quad Input, 10-Output, Dual DPLL, 1 pps Synchronizer and Jitter Cleaner
PDF  62 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

AD9544/PCBZ 데이터시트(HTML) 50 Page - Analog Devices

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AD9544
Data Sheet
Rev. 0 | Page 50 of 62
Note that this formula ignores other contributors to phase error,
including jitter, frequency offset, and propagation delay variation.
If the user has a prior knowledge of the timing of an external
event, such as the switching of the reference input clock source
via an external mux, rather than using the phase transient step
detector, a more robust solution is to invalidate the associated
reference manually. To do so, force a reference fault condition
via the appropriate operational controls bit field. Using this
method imposes the least impact on the steady state operation of
the device. The only steady state impact is that the validation
timer of the associated reference must be set to a duration that
is longer (with suitable margin) than the duration between the
assertion of the force fault condition and the occurrence of the
external event.
SKEW ADJUSTMENT
Skew adjustment allows the user to associate a fixed phase offset
with a reference input, which, for example, is useful in applications
with redundant global navigation satellite system (GNSS)/
global positioning system (GPS) reference sources. That is, a
user may have two or more GNSS/GPS sources that have identical
frequency but may exhibit a fixed time offset due to a mismatch
between antenna cable lengths.
To activate the skew adjustment feature, program the 24-bit
signed Profile x phase skew bit field (where x is the profile number,
Profile 0 to Profile 7). The default value is zero, which disables
the skew adjustment feature. A nonzero value enables the skew
adjustment feature and denotes the desired time skew in units
of picoseconds per the following equation:
Time Skew = Profile x Phase Skew × 10−12
As an example, determine the value of the Profile x phase skew
bit field necessary for a time skew of −35 ns. Solving the
previous equation for the Profile x phase skew yields
Profile x Phase Skew = (−35 × 10−9)/10−12
= −35,000
= 0xFF7748 (hexadecimal)



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