 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
NUC505-YO2G 데이터시트(PDF) 71 Page - Nuvoton Technology Corporation |
|
|
|||||||||||||||||||||||||||||
NUC505-YO2G 데이터시트(HTML) 71 Page - Nuvoton Technology Corporation |
|
|
71 / 130 page  NUC505 July. 26, 2018 Page 71 of 130 Rev.1.08 ─ Debug access to all memory and registers in the system, including access to memory mapped devices, access to internal core registers when the core is halted, and access to debug control registers even while SYSRESETn is asserted. ─ Serial Wire Debug Port (SW-DP) or Serial Wire JTAG Debug Port (SWJ-DP) debug access. But NUC505 only supports SW-DP. ─ Optional Flash Patch and Breakpoint (FPB) unit for implementing breakpoints and code patches. ─ Optional Data Watchpoint and Trace (DWT) unit for implementing watchpoints, data tracing, and system profiling. ─ Bus interfaces: ─ Three Advanced High-performance Bus-Lite (AHB-Lite) interfaces: ICode, Dcode, and System bus interfaces. Private Peripheral Bus (PPB) based on Advanced Peripheral Bus (APB) interface. ─ Bit-band support that includes atomic bit-band write and read operations. ─ Memory access alignment. ─ Write buffer for buffering of write data. ─ Exclusive access transfers for multiprocessor systems. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
