NUC505-YO2G datasheet(95/130 Pages) NUVOTON

95 / 130 page

NUC505

July. 26, 2018

Page 95 of 130

Rev.1.08

2C Serial Interface Controller (Master/Slave)

6.11

6.11.1 Overview

2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data

exchange between devices. The I

2C standard is a true multi-master bus including collision

detection and arbitration that prevents data corruption if two or more masters attempt to control

the bus simultaneously.

Data is transferred between a Master and a Slave synchronously to SCL on the SDA line on a

byte-by-byte basis. Each data byte is 8-bit long. There is one SCL clock pulse for each data bit

with the MSB being transmitted first. An acknowledge bit follows each transferred byte. Each bit is

sampled during the high period of SCL; therefore, the SDA line may be changed only during the

low period of SCL and must be held stable during the high period of SCL. A transition on the SDA

line while SCL is high is interpreted as a command (START or STOP). Please refer to the

following figure for more details about I

2C Bus Timing.

STOP

SDA

SCL

START

Repeated

START

STOP

Figure 6.11-1 I

2C Bus Timing

The device on-chip I

2C logic provides the serial interface that meets the I2C bus standard mode

specification. The I

2C port handles byte transfers autonomously. To enable this port, the bit

I2CEN (I2C_CTL[6]) should be set to '1'. The I

2C H/W interfaces to the I2C bus via two pins: SDA

and SCL. Pull up resistor is needed for I

2C operation as these are open drain pins. When the I/O

pins are used as I

2C port, user must set the pins function to I2C in advance.

NUC505-YO2G 데이터시트(PDF) 95 Page - Nuvoton Technology Corporation