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DSM2180F3 데이터시트(PDF) 47 Page - STMicroelectronics |
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DSM2180F3 데이터시트(HTML) 47 Page - STMicroelectronics |
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47 / 63 page ![]() 47/63 DSM2180F3 Table 25. AC Symbols for PLD Timing Example: tAVWL – Time from Address Valid to Write input Low. Figure 28. Switching Waveforms – Key Signal Letters Signal Behavior A Address Input t Time C CEout Output L Logic Level Low D Input Data H Logic Level High E E Input V Valid N Reset Input or Output X No Longer a Valid Logic Level P Port Signal Output Z Float Q Output Data PW Pulse Width RRD Input (read) S Chip Select Input, BMS, DMS, IOMS, or FSx WWR Input (write) B VSTBY Output M Output Macrocell WAVEFORMS INPUTS OUTPUTS STEADY INPUT MAY CHANGE FROM HI TO LO MAY CHANGE FROM LO TO HI DON'T CARE OUTPUTS ONLY STEADY OUTPUT WILL BE CHANGING FROM HI TO LO WILL BE CHANGING LO TO HI CHANGING, STATE UNKNOWN CENTER LINE IS TRI-STATE AI03102 |
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