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DSM2180F3 데이터시트(PDF) 49 Page - STMicroelectronics

부품명 DSM2180F3
상세설명  DSM (Digital Signal Processor System Memory) For Analog Devices ADSP-218X Family (5V Supply)
PDF  63 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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DSM2180F3
Table 27. CPLD Combinatorial Timing
Note: 1. Fast Slew Rate output available on PB3-PB0, and PD2-PD0.
Symbol
Parameter
Conditions
-90
Fast PT
Alloc
Turbo
Off
Slew
Rate1
Unit
Min
Max
tPD
CPLD Input Pin/Feedback to
CPLD Combinatorial Output
25
Add 2
Add 10
Sub 2
ns
tEA
CPLD Input to CPLD Output
Enable
26
Add 10
Sub 2
ns
tER
CPLD Input to CPLD Output
Disable
26
Add 10
Sub 2
ns
tARP
CPLD Register Clear or Preset
Delay
26
Add 10
Sub 2
ns
tARPW
CPLD Register Clear or Preset
Pulse Width
20
Add 10
ns
tARD
CPLD Array Delay
Any Macrocell
16
Add 2
ns



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