CS42406 datasheet(38/50 Pages) CIRRUS

38 / 50 page

CS42406

DS614PP5

1) After writing to the MAP (see section 4.10.1), initiate a repeated START condition to the I²C bus fol-

lowed by the address byte. The upper 6 bits must be 001000. The seventh bit must match the setting

of the AD0 pin, and the eighth must be 1. The eighth bit of the address byte is the R/W bit.

2) Signal the end of the address byte by

not issuing an acknowledge. The device will then transmit the

contents of the register pointed to by the MAP. The MAP will contain the address of the last register

written to the MAP.

3) If the INCR bit is set to 1, the device will continue to transmit the contents of successive registers. Con-

tinue providing a clock but do not issue an ACK on the bytes clocked out of the device. After all the

desired registers are read, initiate a STOP condition to the bus.

4) If the INCR bit is set to 0 and further I²C reads from other registers are desired, it is necessary to repeat

the procedure detailed from step 1. If no further reads from other registers are desired, initiate a STOP

condition to the bus.

4.10.3

SPI Mode

In SPI mode, data is clocked into the serial control data line, CDIN, by the serial control port clock, CCLK

(see Figure 40 for the clock to data relationship). There is no AD0 pin. Pin CS is the chip select signal and

is used to control SPI writes to the control port. When the device detects a high to low transition on the

AD0/CS pin after power-up, SPI mode will be selected. All signals are inputs and data is clocked in on the

rising edge of CCLK.

4.10.3a

SPI Write

To write to the device, follow the procedure below while adhering to the control port Switching Specifica-

tions.

1) Bring CS low.

2) The address byte on the CDIN pin must then be 00100000.

3) Write to the memory address pointer, MAP. This byte points to the register to be written.

4) Write the desired data to the register pointed to by the MAP.

5) If the INCR bit (see section 4.10.1a) is set to 1, repeat the previous step until all the desired registers

are written, then bring CS high.

6) If the INCR bit is set to 0 and further SPI writes to other registers are desired, it is necessary to bring

CS high, and repeat the procedure detailed from step 1. If no further writes to other registers are de-

sired, bring CS high.

SD A

SC L

00 10 00

A D 0

Sta rt

AC K

MA P

1-8

AC K

00 10 00

AD 0

R epeated S T A R T

A b o rte d W R IT E

AC K

Da ta 1 -8

(pointed to by MA P )

D a ta 1 -8

(p ointed to by MA P )

AC K

Sto p

Figure 39. I²C Read

CS42406 데이터시트(PDF) 38 Page - Cirrus Logic

CS42406 데이터시트(HTML) 38 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

데이터시트 다운로드

링크 URL