| 전자부품 데이터시트 검색엔진 |
|
CS42406 데이터시트(PDF) 45 Page - Cirrus Logic |
|
|
|||||||||||||||||||||||||||||
CS42406 데이터시트(HTML) 45 Page - Cirrus Logic |
|
45 / 50 page ![]() CS42406 45 Zero Cross Zero Cross Enable dictates that signal level changes, either by attenuation changes or muting, will occur on a signal zero crossing to minimize audible artifacts. The requested level change will occur after a timeout period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz input sample rate) if the signal does not encounter a zero crossing. The zero cross function is independent- ly monitored and implemented for each channel. Soft Ramp Soft Ramp allows level changes, both muting and attenuation, to be implemented by incrementally ramping, in 1/8 dB steps, from the current level to the new level at a rate of 1 dB per 8 DAC_LRCK periods. Soft Ramp and Zero Cross Soft Ramp and Zero Cross dictates that signal level changes, either by attenuation changes or mut- ing, will occur in 1/8 dB steps and will be implemented on successive signal zero crossings. The 1/8 dB level changes will occur after timeout periods between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz input sample rate) if the signal does not encounter zero crossings. The zero cross function is independently monitored and implemented for each channel. 6.5.2 CONTROL PORT ENABLE (CPEN) BIT 5 Default = 0 0 - Disabled 1 - Enabled Function: The Control Port will become active and reset to the default settings when this function is enabled. 6.5.3 POWER DOWN (PDN) BIT 4 Default = 1 0 - Disabled 1 - Enabled Function: The DAC will enter a low-power state when this function is enabled, but the contents of the control registers will be retained in this mode. The power-down bit defaults to ‘enabled’ on power-up and must be disabled before normal operation in Control Port mode can occur. 6.5.4 POPGUARD® TRANSIENT CONTROL (POPG) BIT 3 Default = 1 0 - Disabled 1 - Enabled Function: The PopGuard® Transient Control allows the quiescent voltage to slowly ramp to and from 0 volts to the quiescent voltage during power-on or power-off when this function is enabled. Please see section 4.7 for implementation details. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |