ACS70310 datasheet(8/27 Pages) ALLEGRO

8 / 27 page

Very High Precision, Programmable Linear Hall-Effect Sensor IC

with Reverse Battery Protection and High-Bandwidth (240 kHz)

Analog Output for Core-Based Current Sensing

ACS70310

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Quiescent Voltage Output (VOUT(QU/BI))

In the quiescent state (no significant magnetic field: B = 0 G), the

output (VOUT(QU/BI)) has a constant ratio to the supply voltage

(VCC) throughout the entire operating ranges of VCC and ambi-

ent temperature (TA). U and BI correspond to unidirectional or

bidirectional mode.

Before any programming, the Quiescent Voltage Output

(VOUT(Q)) has a nominal value of VCC /2 for a bidirectional

device and 0.5 V for unidirectional parts with a VCC of 5 V.

Quiescent Voltage Output Programming Range

The Quiescent Voltage Output (VOUT(Q)) can be programmed

within the Quiescent Voltage Output limits. Exceeding the speci-

fied Quiescent Voltage Output limits will cause Quiescent Volt-

age Output Drift Through Temperature Range (ΔVOUT(Q)TC) to

deteriorate beyond the specified values.

Average Quiescent Voltage Output Program-

ming Step Size (StepVOUT(Q))

The Average Quiescent Voltage Output Progamming Step Size

(StepVOUT(Q)) is determined using the following calculation:

VOUT(Q)maxcode – VOUT(Q)mincode

2n – 1

VOUT(Q)Step =

(1)

where n is the number of available programming bits in the trim

range, 9 bits, VOUT(Q)maxcode is at decimal code 255, and

VOUT(Q)mincode is at decimal code 256.

Quiescent Voltage Output Programming

Resolution

The programming resolution for any device is half of its pro-

gramming step size.

The step size of each bit can vary. For best accuracy, check VOUT

after every trim. The devices DAC performance is screened and

accounted in the factory-standard trim, but becomes a possible

source of error if the devices is reprogramed beyond the Qui-

escent Voltage Output; programming beyond this range causes

VOUT(Q)TC to be invalid.

Quiescent Voltage Output Drift Through

Temperature Range (VOUT(Q)TC)

Due to internal component tolerances and thermal consider-

ations, the Quiescent Voltage Output (VOUT(Q)) may drift from its

nominal value through the operating ambient temperature (TA).

The Quiescent Voltage Output Drift Through Temperature Range

(ΔVOUT(Q)TC) is defined as:

DVOUT(Q)TC = VOUT(Q)(TA) – VOUT(Q)EXPECTED(TA)

(2)

∆VOUT(Q)TC should be calculated using the actual measured

values of ∆VOUT(Q)(TA) and ∆VOUT(Q)EXPECTED(TA) rather than

programming target values.

Sensitivity (Sens)

The presence of a south polarity magnetic field, perpendicular

to the branded surface of the package face, increases the output

voltage from its quiescent value toward the supply voltage rail.

The amount of the output voltage increase is proportional to the

magnitude of the magnetic field applied.

Conversely, the application of a north polarity field decreases the

output voltage from its quiescent value. This proportionality is

specified as the magnetic sensitivity, Sens (mv/G), of the device,

and it is defined as:

Sens

V– V

OUT(BPOS)

OUT(BNEG)

BPOS – BNEG

(3)

where BPOS and BNEG are two magnetic fields with opposite

polarities.

Initial Factory-Programmed Sensitivity

Before any programming, Sensitivity has a nominal value that

depends on the SENS_COARSE bits setting. Each ACS70310

variant has a different SENS_COARSE setting. The parts TC per-

formance is guaranteed if the SENS_COARSE bit is in its default

factory value and within the Sensitivity Programing Range cor-

responding to the SENS_COARSE bit.

Sensitivity Programming Range (SensPR)

The magnetic sensitivity (Sens) can be programmed around its

initial value within the sensitivity range limits: SensPR(min) and

SensPR(max). Exceeding the specified Sensitivity Range will

cause Sensitivity Drift Through Temperature Range (ΔSensTC) to

deteriorate beyond the specified values.

ACS70310 데이터시트(PDF) 8 Page - Allegro MicroSystems

ACS70310 데이터시트(HTML) 8 Page - Allegro MicroSystems

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27

데이터시트 다운로드

링크 URL