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ACS70310 데이터시트(PDF) 19 Page - Allegro MicroSystems |
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ACS70310 데이터시트(HTML) 19 Page - Allegro MicroSystems |
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19 / 27 page ![]() Very High Precision, Programmable Linear Hall-Effect Sensor IC with Reverse Battery Protection and High-Bandwidth (240 kHz) Analog Output for Core-Based Current Sensing ACS70310 19 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Parameter Description Min. Max. tsclk System clock period after trimming. 133 ns (7.5 MHz) 167 ns (6 MHz) tbit Bit time. 1 µs (1 MBd) 1 ms (1 kBd) tDIS_TOP OUT pin is disabled after raising VCC. 56 µs (512 × tsclk) 73.5 µs (514 × tsclk) tOUTH_1ST_TOP The OUT pin is either pulled high or low. No low-to-high transitions are allowed after this MAX time except to start the Manchester command. This is for the 1st Manchester command after raising VCC. 73.5 µs 123 µs tCMD_1ST_TOP Time required before the 1st Manchester command can be sent after raising VCC. 144 µs n/a tLOW Time required to hold output low before the 1st Manchester edge. 1 µs n/a M Data tLOW tCMD_1ST_TOP tOUTH_1ST_TOP tDIS_TOP switch point VCC Nominal OUT OUT is active Device stops driving OUT by here OUT can be pulled high or low Past this MAX time OUT cannot transition Low to High except to start Manchester OUT is required to be low before a Manchester command Earliest time for Manchester command Generic Timing For initial portion of Manchester command |
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