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68HC705JB3 데이터시트(PDF) 72 Page - Freescale Semiconductor, Inc |
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68HC705JB3 데이터시트(HTML) 72 Page - Freescale Semiconductor, Inc |
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72 / 134 page ![]() GENERAL RELEASE SPECIFICATION November 5, 1998 MOTOROLA UNIVERSAL SERIAL BUS MODULE MC68HC05JB3 10-4 REV 1 Figure 10-3. Supported USB Packet Types The following sections will give some detail on each segment used to form a complete USB transaction. 10.2.1.1 Sync Pattern The NRZI (See Section 10.4.4.1) bit pattern shown in Figure 10-4 is used as a synchronization pattern and is prefixed to each packet. This pattern is equivalent to a data pattern of seven 0’s followed by a 1 (0x80). Figure 10-4. Sync Pattern The start of a packet (SOP) is signaled by the originating port by driving the D+ and D– lines from the idle state (also referred to as the “J” state) to the opposite logic level (also referred to as the “K” state). This switch in levels represents the first bit of the Sync field. Figure 10-5 shows the data signaling and voltage levels for the start of packet and the sync pattern. Token Packet: IN OUT SYNC PID PID ADDR ENDP CRC5 EOP SETUP Data Packet: DATA0 SYNC PID PID DATA CRC5 EOP DATA1 0 - 8 bytes Handshake Packet: ACK NAK SYNC PID PID EOP STALL SYNC PATTERN PID0 PID1 Idle NRZI Data Encoding Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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