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IP4856CX25/C 데이터시트(PDF) 15 Page - Nexperia B.V. All rights reserved |
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IP4856CX25/C 데이터시트(HTML) 15 Page - Nexperia B.V. All rights reserved |
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15 / 22 page ![]() IP4856CX25_C All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 2 — 15 October 2014 14 of 21 NXP Semiconductors IP4856CX25/C SD 3.0-compliant memory card integrated dual voltage level translator 13. Test information Definitions test circuit: Rsource = source resistance of pulse generator. Rterm = termination resistance should be equal to output impedance Zo of pulse generator. CL = load capacitance including jig and probe capacitance. RL = load resistance. Fig 8. Load circuitry for measuring switching time |
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