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CS5368 데이터시트(PDF) 18 Page - Cirrus Logic

부품명 CS5368
상세설명  114 dB, 192 kHz, 8-Channel A/D Converter
PDF  39 Pages
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제조업체  CIRRUS [Cirrus Logic]
홈페이지  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS5368 데이터시트(HTML) 18 Page - Cirrus Logic

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DS624A1
21
CS5368
SWITCHING SPECIFICATIONS - CONTROL PORT - SPI TIMING
(VLC = 1.8 V - 5.0 V, VLS = VD = 3.3 V, VA = 5.0 V; Inputs: Logic 0 = DGND, Logic 1 = VLC, CDOUT CL =30pF)
Notes:
1.
Data must be held for sufficient time to bridge the transition time of CCLK.
2.
For fsck <1 MHz
3.
For fsck <1 MHz.
Figure 5. SPI Timing
Parameter
Symbol
Min
Max
Units
CCLK Clock Frequency
fsck
06.0
MHz
RST Rising Edge to CS Falling
tsrs
20
-
ns
CS Falling to CCLK Edge
tcss
20
-
ns
CS High Time Between Transmissions
tcsh
1.0
-
µs
CCLK Low Time
tscl
66
-
ns
CCLK High Time
tsch
66
-
ns
CDIN to CCLK Rising Setup Time
tdsu
40
-
ns
CCLK Rising to DATA Hold Time1
tdh
15
-
ns
CCLK Falling to CDOUT Stable
tpd
-50
ns
Rise Time of CDOUT
tr1
-25
ns
Fall Time of CDOUT
tf1
-25
ns
Rise Time of CCLK and CDIN2
tr2
-
100
ns
Fall Time of CCLK and CDIN3
tf2
-100
ns
CS
CCLK
CDIN
CDOUT
RST
t
srs
t
scl
t
sch
t
css
t
r2
t
f2
t
csh
t
dsu
t
dh
t
pd



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