30

DS624A1

CS5368

Table 8. Frequencies for 96 kHz Sample Rate using TDM

Table 9. Frequencies for 192 kHz Sample Rate using TDM

4.7

Serial Audio Formats

The ADC supports I²S, Left-Justified and TDM digital interface formats. Audio data should be latched by the

receiver on the rising edge of SCLK within the specified setup and hold times.

Figure 12. LJ Format

Figure 13. I²S Format

Figure 14. TDM Format

TDM MASTER OR SLAVE

DSM

MCLK Divider

÷4

MCLK (MHz)

49.152

36.864

24.567

18.384

12.288

SCLK (MHz)

24.576

24.576

24.576

24.576

24.576

MCLK/FS Ratio

512

384

256

192

128

SCLK/FS Ratio

256

256

256

256

256

TDM MASTER OR SLAVE

QSM

MCLK Divider

÷4

MCLK (MHz)

49.152

36.864

24.567

18.384

12.288

SCLK (MHz)

49.152

49.152

49.152

49.152

49.152

MCLK/FS Ratio

256

192

128

96

64

SCLK/FS Ratio

256

256

256

256

256

Odd Channels 1,3, ...

Even Channels 2,4, ...

LRCK

receiver latches data on rising edges of SCLK

MSB

...

LSB

MSB

MSB

...

LSB

SDOUT

SCLK

Odd Channels 1,3, ...

Even Channels 2,4, ...

LRCK

receiver latches data on rising edges of SCLK

SDOUT

SCLK

MSB

...

LSB

MSB

...

LSB

MSB

Channel 6

SCLK

LSB

MSB

LSB

MSB

LSB

MSB

LSB

MSB

LSB

MSB

LSB

MSB

TDM OUT

Channel 1

Channel 4

Channel 2

Channel 5

Channel 3

32 clks

32 clks

32 clks

32 clks

32 clks

32 clks

Channel 8

LSB

MSB

LSB

MSB

Channel 7

32 clks

32 clks

FS

256 sclks

MSB

Bit or Word Wide

LSB