Data Sheet AS8446

Revision 1.8, Date 2005-03-17

Page 6 of 35

General Application Diagram

Vbat

M

TP

Wake-up

Vbat

VSS

Iref

VDDctrl

VDD

CP2

CP1

Vpump

OUT

CS

CMP

DATAout

CMN

FAIL

PWM

25

26

24

23

22

21

20

19

18

17

16

CLK

DATAin

Tst1

Tst2

27

28

RESET

1

D1

Cbat

Tr1

CP12

CP0

VDD = 5 V

Rref

R

NTC

R

T1

M+

M-

GND_P

Power part

Control part

15

2

3

4

5

6

7

8

9

10

11

12

13

14

VMO

ADC

WD

µP

Q1

OSC1

OSC2

PWMout

VDD

GND

(optional)

Tst3

n.c.

CLK

CS

INR

ANA

Port1

Port2

SPIout

SPIin

RESET

Tout

GND_P

VSS

Figure 3

General Board Diagram of a complete PWM DC Motor Regulator

Remarks:

a)

The communication between the AS8446 and the controlling

µP is realized via the Three-Wire Interface

b)

The communication of the whole motor regulator module with the environment can be realized in different ways:

1. low voltage 5 V digital input using a digital

µP port

2. low voltage 5 V analog output using an analog ADC input of the

µP

c)

The EMC parameters to optimize the EMC behavior of the whole regulator system can be stored in the program of the

µP

and transmitted to the AS8446 via Three-Wire Interface during start up of the system.

d)

The customer has free choice of the

µP.