JS28F320J3A-150 datasheet(51/72 Pages) INTEL

전자부품 데이터시트 검색엔진

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JS28F320J3A-150 데이터시트(PDF) 51 Page - Intel Corporation

51 / 72 page

256-Mbit J3 (x8/x16)

Datasheet

10 = pulse on Program Complete

Used to generate a system interrupt pulse when any flash device in

an array has completed a program operation. Provides highest

performance for servicing continuous buffer write operations.

11 = pulse on Erase or Program

Complete

Used to generate system interrupts to trigger servicing of flash arrays

when either erase or program operations are completed, when a

common interrupt service routine is desired.

NOTES:

1. When configured in one of the pulse modes, STS pulses low with a typical pulse width of 250 ns.

2. An invalid configuration code will result in both SR.4 and SR.5 being set.

Table 22. STS Configuration Coding Definitions

Reserved

Pulse on

Program

Complete

(1)

Pulse on

Erase

Complete

(1)

D[1:0] = STS Configuration Codes

Notes

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