VSC7440 datasheet(394/444 Pages) MICROSEMI

394 / 444 page

Electrical Specifications

VMDS-10492 VSC7440 Datasheet Revision 4.2

377

where, IS = saturation current, q = electron charge, VD = voltage across the diode, k = Boltzmann

constant, and T = absolute temperature (Kelvin).

6.2

AC Characteristics

This section provides the AC specifications for the VSC7440 device.

6.2.1

Reference Clock

The signal applied to the REFCLK differential inputs must comply with the requirements listed in the

following tables at the pin of the device.

The following table lists the AC specifications for the REFCLK reference clock.

The following table lists the AC specifications for the REFCLK2 reference clock. Use of a 25 MHz single-

ended reference clock is not supported on REFCLK2.

Table 288 •

REFCLK Reference Clock

Parameter

Symbol Minimum

Typical Maximum

Unit

Condition

REFCLK frequency

REFCLK_CONF = 100

–100 ppm

100 ppm

MHz

REFCLK frequency

REFCLK_CONF = 000

–100 ppm

125

100 ppm

MHz

REFCLK frequency

REFCLK_CONF = 001

–100 ppm

156.25

100 ppm

MHz

REFCLK frequency

REFCLK_CONF = 010

–100 ppm

250

100 ppm

MHz

Clock duty cycle

Measured at 50% threshold.

Rise time and fall time

tR, tF

0.5

Within ±200 mV relative to

VDD × 2/3.

Jitter transfer from REFCLK to

SerDes output, bandwidth

from 10 kHz to 1 MHz

0.3

Jitter transfer from REFCLK to

SerDes output, bandwidth

from 1 MHz to 10 MHz

125 MHz reference clock.

Jitter transfer from REFCLK to

SerDes output, bandwidth

above 10 MHz

2 – 20 × log

(ƒ/7 MHz)

125 MHz reference clock.

REFCLK input peak-to-peak

jitter, bandwidth from 2.5 kHz

to 10 MHz1

Peak-to-peak values are typically higher than the RMS value by a factor of 10 to 14.

To meet G.8262 1G SyncE jitter

generation specification.

Table 289 •

REFCLK2 Reference Clock

Parameter

Symbol Minimum

Typical Maximum Unit

Condition

REFCLK2 frequency

REFCLK2_CONF= 000

–100 ppm 125

100 ppm

MHz

REFCLK2 frequency

REFCLK2_CONF = 001

–100 ppm 156.25

100 ppm

MHz

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