SAMV71Q21 datasheet(11/41 Pages) MICROCHIP

11 / 41 page

Analog Front-End Controller (AFEC)

2.1

Write Protection

The AFEC_CSELR register is not write-protected.

Workaround

None.

Affected Silicon Revisions

2.2

Performance

The AFEC is sensitive to noise. Too much noise may lead to reduced AFEC performance, especially INL,

DNL and SNR. The following situations generate noise:

•

Using a 64-pin QFP package option (it does not have the VREFN pin)

•

Device activity (that is, clock tree)

•

External components (that is, missing on-board supply decoupling capacitors)

Workaround

Adapt the environment to the expected level of performances.

Affected Silicon Revisions

2.3

AOFF bit

Changing the AOFF bit in the AFEC_COCR register during conversions is not safe.

The recommended value of the AOFF bit is 512 (the default value is zero). Different values are possible

for each channel. The AOFF bit is read and updated during the AFE start-up sequence and at the end of

each conversion. If during AFE idle time (no conversion is on-going) the user updates the AOFF bit for

the next channel to be converted, the next conversion will be incorrect.

Workaround

The value of the AOFF bit can be updated only if the AFEC module is restarted, or if two conversions are

run; the second one will have the correct AOFF bit setting.

SAM E70/S70/V70/V71 Family

Analog Front-End Controller (AFEC)

Datasheet Errata

DS80000767C-page 11

SAMV71Q21 데이터시트(PDF) 11 Page - Microchip Technology