전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

ADC32RF83 데이터시트(PDF) 95 Page - Texas Instruments

Click here to check the latest version.
부품명 ADC32RF83
상세설명  ADC32RF8x Dual-Channel, 3-GSPS Telecom Receiver and Feedback Devices
PDF  138 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI - Texas Instruments

ADC32RF83 데이터시트(HTML) 95 Page - Texas Instruments

Back Button ADC32RF83 Datasheet HTML 91Page - Texas Instruments ADC32RF83 Datasheet HTML 92Page - Texas Instruments ADC32RF83 Datasheet HTML 93Page - Texas Instruments ADC32RF83 Datasheet HTML 94Page - Texas Instruments ADC32RF83 Datasheet HTML 95Page - Texas Instruments ADC32RF83 Datasheet HTML 96Page - Texas Instruments ADC32RF83 Datasheet HTML 97Page - Texas Instruments ADC32RF83 Datasheet HTML 98Page - Texas Instruments ADC32RF83 Datasheet HTML 99Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 95 / 138 page
background image
95
ADC32RF80, ADC32RF83
www.ti.com
SBAS774A – MAY 2016 – REVISED DECEMBER 2016
Product Folder Links: ADC32RF80 ADC32RF83
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Table 67. Register 032h-035h Field Descriptions
Bit
Field
Type
Reset
Description
7-2
SEL EMP LANE
R/W
0h
These bits select the amount of de-emphasis for the JESD
output transmitter. The de-emphasis value in dB is measured as
the ratio between the peak value after the signal transition to the
settled value of the voltage in one bit period.
0 = 0 dB
1 = –1 dB
3 = –2 dB
7 = –4.1 dB
15 = –6.2 dB
31 = –8.2 dB
63 = –11.5 dB
1-0
0
W
0h
Must write 0
8.5.11.10 Register 036h (address = 036h), JESD Digital Page
Figure 183. Register 036h
7
6
5
4
3
2
1
0
0
CMOS SYNCB
0
0
0
0
0
0
W-0h
R/W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 68. Register 036h Field Descriptions
Bit
Field
Type
Reset
Description
7
0
W
0h
Must write 0
6
CMOS SYNCB
R/W
0h
This bit enables single-ended control of SYNCB using the
GPIO4 pin (pin 63). The differential SYNCB input is ignored. Set
the EN CMOS SYNCB bit and keep the CH bit high to make this
bit effective.
0 = Differential SYNCB input
1 = Single-ended SYNCB input using pin 63
5-0
0
W
0h
Must write 0
8.5.11.11 Register 037h (address = 037h), JESD Digital Page
Figure 184. Register 037h
7
6
5
4
3
2
1
0
0
0
0
0
0
0
PLL MODE
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 69. Register 037h Field Descriptions
Bit
Field
Type
Reset
Description
7-2
0
W
0h
Must write 0
1-0
PLL MODE
R/W
0h
These bits select the PLL multiplication factor; see the JESD
tables in the JESD204B Frame Assembly section for settings.
00 = 20X mode
01 = 16X mode
10 = 40x mode (the 40x MODE bit in register 16h must also be
set)
11 = 80x mode



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com