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AS9C25512M2018L 데이터시트(PDF) 25 Page - Alliance Semiconductor Corporation

부품명 AS9C25512M2018L
상세설명  2.5V 512/256K x 18 Synchronous Dual-port SRAM with 3.3V or 2.5V interface
PDF  30 Pages
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제조업체  ALSC [Alliance Semiconductor Corporation]
홈페이지  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

AS9C25512M2018L 데이터시트(HTML) 25 Page - Alliance Semiconductor Corporation

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AS9C25512M2018L
AS9C25256M2018L
9/24/04, v.1.2
Alliance Semiconductor
P. 25 of 30
®
Identification register definitions
Scan register sizes
Instruction codes
Instruction field
Value
Description
Revision number (31:28)
TBD
Version Number
Device depth (27:12)
TBD
ALSC part number
JEDEC ID code (11:1)
00001010010
Manufacturer Identity Code
(ALSC)
Indicator Bit (0)
1
ID Register presence indicator
Register name
Bit size
Instruction Register (IR)
4
Bypass Register (BYR)
1
Identification Register (IDR)
32
Boundary Scan Register (BSR)
112
Instruction
Code
Description
Selected Reg
EXTEST
0000
Forces contents of the BSR onto the device outputs.
BSR
SAMPLE/PRELOAD
0001
Samples the I/O ring contents. Preloads test data into the
BSR.
BSR
IDCODE
0010
Loads the IDR with the vendor ID code and places the
register between TDI and TDO.
IDR
CLAMP
0011
Forces contents of the BSR onto the device outputs.
BYR
HIGHZ
0100
Forces all device 2-state and 3-state outputs to High-Z.
BYR
RESERVED
0101 - 1110 Reserved states. Do not use.
BYR
BYPASS
1111
Places the BYR between TDI and TDO.
BYR



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