| 전자부품 데이터시트 검색엔진 |
|
EKTF6708 데이터시트(PDF) 4 Page - ELAN Microelectronics Corp |
|
|
|||||||||||||||||||||||||||||
EKTF6708 데이터시트(HTML) 4 Page - ELAN Microelectronics Corp |
|
4 / 158 page ![]() Contents iv IC Product Specification (V1.2) 03.12.2020 6.1.26 Bank 0 R1F: (Reserved).................................................................................26 6.1.27 Bank 0 R20: IMR6 (Interrupt Mask Register 6) ..............................................26 6.1.28 Bank 0 R21: WDTCR (Watchdog Timer Control Register).............................26 6.1.29 Bank 0 R22: TCCCR (TCC Control Register) ................................................27 6.1.30 Bank 0 R23: TCCD (TCC Data Register) .......................................................28 6.1.31 Bank 0 R24: TC1CR1 (Timer 1 Control Register 1) .......................................28 6.1.32 Bank 0 R25: TC1CR2 (Timer 1 Control Register 2) .......................................29 6.1.33 Bank 0 R26: TC1DA (Timer/Counter 1 DATA Buffer A) ..................................30 6.1.34 Bank 0 R27: TC1DB (Timer/Counter 1 DATA Buffer B)..................................30 6.1.35 Bank 0 R28 ~ R2F: (Reserved) ......................................................................31 6.1.36 Bank 0 R30: I2CCR1 (I2C Status and Control Register 1) ............................31 6.1.37 Bank 0 R31: I2CCR2 (I2C Status and Control Register 2) ............................32 6.1.38 Bank 0 R32: I2CSA (I2C Slave Address Register) .........................................33 6.1.39 Bank 0 R33: I2CDB (I2C Data Buffer Register) .............................................33 6.1.40 Bank 0 R34: I2CDAL (I2C Device Address Register).....................................34 6.1.41 Bank 0 R35: I2CDAH (I2C Device Address Register) ....................................34 6.1.42 Bank 0 R36: SPICR (SPI Control Register) ...................................................34 6.1.43 Bank 0 R37: SPIS (SPI Status Register)........................................................35 6.1.44 Bank 0 R38: SPIR (SPI Read Buffer Register) ..............................................36 6.1.45 Bank 0 R39: SPIW (SPI Write Buffer Register) ..............................................36 6.1.46 Bank 0 R3A ~ R3D: (Reserved) .....................................................................36 6.1.47 Bank 0 R3E: ADCR1 (ADC Control Register 1) .............................................36 6.1.48 Bank 0 R3F: ADCR2 (ADC Control Register 2) .............................................38 6.1.49 Bank 0 R40: ADISR (Analog to Digital Converter Input Channel Selection Register) .........................................................................................................39 6.1.50 Bank 0 R41: ADER1 (Analog to Digital Converter Input Control Register 1) .39 6.1.51 Bank 0 R42: (Reserved) .................................................................................40 6.1.52 Bank 0 R43: ADDL (Low Byte of Analog to Digital Converter Data)...............40 6.1.53 Bank 0 R44: ADDH (High Byte of Analog to Digital Converter Data) .............40 6.1.54 Bank 0 R45: ADCVL (Low Byte of Analog to Digital Converter Comparison) 40 6.1.55 Bank 0 R46: ADCVH (High Byte of Analog to Digital Converter Comparison) ........................................................................................................................ 40 6.1.56 Bank 0 R47~4F: (Reserved)...........................................................................40 6.1.57 Bank 1 R5 ~ R7: (Reserved) ..........................................................................40 6.1.58 Bank 1 R8: P5PHCR (Port 5 Pull-high Control Register) ...............................40 6.1.59 Bank 1 R9: P6PHCR (Port 6 Pull-high Control Register) ...............................41 6.1.60 Bank 1 RA: P7PHCR (Ports 7 Pull-high Control Register).............................41 6.1.61 Bank 1 RB: P5PLCR (Port 5 Pull-low Control Register).................................42 6.1.62 Bank 1 RC: P6PLCR (Port 6 Pull-low Control Register) ................................42 6.1.63 Bank 1 RD: P7PLCR (Ports 7 Pull-low Control Register) ..............................42 6.1.64 Bank 1 RE: P5HDSCR (Port 5 High Drive/Sink Control Register) .................43 6.1.65 Bank 1 RF: P6HDSCR (Port 6 High Drive/Sink Control Register) .................43 6.1.66 Bank 1 R10: P7HDSCR (Port 7 High Drive/Sink Control Register) ...............43 6.1.67 Bank 1 R11: P5ODCR (Port 5 Open-Drain Control Register) ........................43 |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |