EKTF6708 datasheet(5/158 Pages) EMC

5 / 158 page

Contents

IC Product Specification (V1.2) 03.12.2020

 v

6.1.68

Bank 1 R12: P6ODCR (Port 6 Open-Drain Control Register) ........................44

6.1.69

Bank 1 R13: P7ODCR (Ports 7 Open-Drain Control Register) ......................44

6.1.70

Bank 1 R14 ~ R15: (Reserved) ......................................................................44

6.1.71

Bank 1 R16: PWMSCR (PWM Source Clock Control Register) ....................44

6.1.72

Bank 1 R17: PWMACR (PWMA Control Register).........................................44

6.1.73

Bank 1 R18: PRDAL (Low Byte of PWMA Period) .........................................45

6.1.74

Bank 1 R19: PRDAH (High Byte of PWMA Period)........................................46

6.1.75

Bank 1 R1A: DTAL (Low Byte of PMWA Duty) ...............................................46

6.1.76

Bank 1 R1B: DTAH (High Byte of PMWA Duty) .............................................46

6.1.77

Bank 1 R1C: TMRAL (Low Byte of Timer A)...................................................46

6.1.78

Bank 1 R1D: TMRAH (High Byte of Timer A) .................................................46

6.1.79

Bank 1 R1E: PWMBCR (PWMB Control Register) ........................................46

6.1.80

Bank 1 R1F: PRDBL (Low Byte of PWMB Period).........................................47

6.1.81

Bank 1 R20: PRDBH (High Byte of PWMB Period) .......................................47

6.1.82

Bank 1 R21: DTBL (Low Byte of PMWB Duty)...............................................48

6.1.83

Bank 1 R22: DTBH (High Byte of PMWB Duty) .............................................48

6.1.84

Bank 1 R23: TMRBL (Low Byte of Timer B) ...................................................48

6.1.85

Bank 1 R24: TMRBH (High Byte of Timer B)..................................................48

6.1.86

Bank 1 R25: PWMCCR (PWMC Control Register) ........................................48

6.1.87

Bank 1 R26: PRDCL (Low Byte of PWMC Period).........................................49

6.1.88

Bank 1 R27: PRDCH (High Byte of PWMC Period) .......................................49

6.1.89

Bank 1 R28: DTCL (Low Byte of PMWC Duty) ..............................................49

6.1.90

Bank 1 R29: DTCH (High Byte of PMWC Duty) .............................................50

6.1.91

Bank 1 R2A: TMRCL (Low Byte of Timer C) ..................................................50

6.1.92

Bank 1 R2B: TMRCH (High Byte of Timer C).................................................50

6.1.93

Bank 1 R2C ~ R32: (Reserved)......................................................................50

6.1.94

Bank 1 R33: URCR (UART Control Register) ................................................50

6.1.95

Bank 1 R34: URS (UART Status Register) ....................................................51

6.1.96

Bank 1 R35: URTD (UART Transmit Data Buffer Register) ...........................52

6.1.97

Bank 1 R36: URRDL (UART Receive Data Low Buffer Register) ..................52

6.1.98

Bank 1 R37: URRDH (UART Receive Data High Buffer Register) ................52

6.1.99

Bank 1 R38 ~ R43: (Reserved) ......................................................................52

6.1.100 Bank 1 R44: FLKR (Flash Key Register for Table write use) .........................53

6.1.101 Bank 1 R45: TBPTL (Table Point Low Register) ............................................53

6.1.102 Bank 1 R46: TBPTH (Table Point High Register) ...........................................53

6.1.103 Bank 1 R47: STKMON (Stack Pointer)...........................................................53

6.1.104 Bank 1 R48: PCH (Program Counter High)....................................................53

6.1.105 Bank 1 R49: HLVDCR (High / Low Voltage Detector Control Register) .........54

6.1.106 Bank 1 R4A~ R4C: (Reserved) ......................................................................55

6.1.107 Bank 1 R4D: TBWCR (Table Write Control Register).....................................55

6.1.108 Bank 1 R4E: TBWAL (Table Write start Address Low byte) ...........................55

6.1.109 Bank 1 R4F: TBWAH (Table Write start Address High byte) ..........................55

6.1.110 Bank 2 R5: TKAPC (Touch Key Group A Pin Control Register) .....................56

6.1.111 Bank 2 R6: (Reserved) ...................................................................................57

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