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USB3347CPTR 데이터시트(PDF) 72 Page - Microchip Technology

부품명 USB3347CPTR
상세설명  Enhanced Single Supply Hi-Speed USB ULPI Transceiver
PDF  92 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

USB3347CPTR 데이터시트(HTML) 72 Page - Microchip Technology

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USB334x
DS00002646A-page 72
2009-2018 Microchip Technology Inc.
7.1.2.4
Carkit Interrupt Latch
Address = 21h (read only with auto-clear)
Note 7-3
rd: Read Only with auto clear
7.1.3
VENDOR REGISTER ACCESS
The vendor specific registers include the range from 30h to 3Fh. These can be accessed by the ULPI immediate register
read / write.
7.1.3.1
HS Compensation Register
Address = 31h (read / write)
The USB334x is designed to meet the USB specifications and requirements when the DP and DM signals are properly
designed on the PCB. The DP and DM trace impedance should be 45Ω single ended and 90Ω differential. In cases
where the DP and DM traces are not able to meet these requirements the HS Compensation register can be used to
compensate for the losses in signal amplitude.
RidConversionDone
6
rd
0b
Automatically asserted by the USB334x when the Rid
Conversion is finished. The conversion will take
282uS. This bit will auto clear when the RidValue is
read from the Rid Conversion Register. Reading the
RidValue from the Carkit Interrupt Status register will
not clear either RidConversionDone status bit.
Note:
RidConversionDone can also be read from
the Vendor Rid Conversion register
described in Section 7.1.3.4, "Vendor Rid
Conversion," on page 74.
Reserved
7
rd
0b
Read only, 0.
Field Name
Bit
Access
Default
Description
IdFloat Latch
0rd
(Note 7-3)
0b
Asserted if the state of the ID pin changes from non-
floating to floating while the IdFloatRise bit is enabled
or if the state of the ID pin changes from floating to
non-floating while the IdFloatFall bit is enabled.
VdatDet Latch
1rd
0b
If VdatDetIntEn is set and the VdatDet bit changes
state, this bit will be asserted.
CarDp Latch
2
rd
0b
Not Implemented. Reads as 0b.
RidConversionLatch
3rd
(Note 7-3)
0b
If RidIntEn is set and the state of the
RidConversionDone bit changes from a 0 to 1 this bit
will be asserted.
Reserved
7:4
rd
0000b
Read only, 0.
Field Name
Bit
Access
Default
Description



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