ST2

ST1

Self-test mode

0

0

Normal mode

0

1

Positive sign self-test

1

0

Negative sign self-test

1

1

Not allowed

7.5

CTRL_REG5 (24h)

Control register 5

0 (1)

0(1)

0(1)

0(1)

0(1)

0(1)

0(1)

FIFO_SPI_

HS_ON

1. This bit must be set to ‘0’ for correct operation of the device.

FIFO_SPI_HS_ON

Enables the SPI high speed configuration for the FIFO block that is used to guarantee a minimum

duration of the window in which writing operation of RAM output is blocked. This bit is recommended for

SPI clock frequencies higher than 6 MHz. Default value: 0

(0: not enabled; 1: enabled)

7.6

OUT_TEMP_L (25h), OUT_TEMP_H (26h)

Temperature data output register. L and H registers together express a 16-bit word in two’s complement left-

justified.

Temp3

Temp2

Temp1

Temp0

0

0

0

0

Temp11

Temp10

Temp9

Temp8

Temp7

Temp6

Temp5

Temp4

Temp [11:0]

Temperature sensor output data.

The value is expressed as two’s complement sign.

0 LSB represents T=25 °C ambient.

IIS3DHHC

CTRL_REG5 (24h)

DS12292 - Rev 3

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