RX113 datasheet(8/131 Pages) RENESAS

8 / 131 page

R01DS0216EJ0120 Rev.1.20

Page 8 of 131

Sep 07, 2020

RX113 Group

1. Overview

1.3

Block Diagram

Figure 1.2 shows a block diagram.

Figure 1.2

Block Diagram

ICUb:

Interrupt controller

DTCa:

Data transfer controller

TMR:

8-bit timer

IWDTa:

Independent watchdog timer

ELC:

Event link controller

CRC:

CRC (cyclic redundancy check) calculator

SCIe/SCIf:

Serial communications interface

RSPI:

Serial peripheral interface

RIIC:

2C bus interface

MTU2a: Multi-function timer pulse unit 2

POE2a: Port output enable 2

SSI:

Serial sound interface

CMT:

Compare match timer

RTCc:

Realtime clock

DOC:

Data operation circuit

CAC:

Clock frequency accuracy measurement circuit

CTSU:

Capacitive touch sensing unit

Clock

generation

circuit

RX CPU

RAM

ROM

Port 0

Port 1

Port 3

Port 4

12-bit D/A converter × 2 channels

RIIC × 1 channel

DOC

SCIe × 7 channels

(including IrDA × 1 channel)

E2 DataFlash

CRC

ELC

RTCc

MTU2a × 6 channels

12-bit A/D converter × 17 channels

CMT × 2 channels (unit 0)

RSPI × 1 channel

DTCa

ICUb

CAC

SCIf × 1 channel

Port 5

Port A

Port B

Port C

Port E

POE2a

IWDTa

SSI

Port 2

Temperature sensor

Port J

USB 2.0 host/function module

Comparator B

LCD controller/driver

CTSU

CMT × 2 channels (unit 1)

TMR × 2 channels (unit 0)

TMR × 2 channels (unit 1)

Port 9

Port D

Port F

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