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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STM32F334C8U6TR 데이터시트(PDF) 18 Page - STMicroelectronics |
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STM32F334C8U6TR 데이터시트(HTML) 18 Page - STMicroelectronics |
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18 / 125 page  Functional overview STM32F334x4 STM32F334x6 STM32F334x8 18/125 DS9994 Rev 9 3.6 Clocks and startup System clock selection is performed on startup, however the internal RC 8 MHz oscillator is selected on reset as default CPU clock. An external 4-32 MHz clock can be selected, in which case it is monitored for failure. If failure is detected, the system automatically switches back to the internal RC oscillator. A software interrupt is generated if enabled. Similarly, full interrupt management of the PLL clock entry is available when necessary (for example with failure of an indirectly used external oscillator). Several prescalers allow to configure the AHB frequency, the high-speed APB (APB2) and the low-speed APB (APB1) domains. The maximum frequency of the AHB and the high-speed APB domains is 72 MHz, while the maximum allowed frequency of the low- speed APB domain is 36 MHz. TIM1and HRTIM1 maximum frequency is 144 MHz. |
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