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STM32L552CCT3PTR 데이터시트(PDF) 47 Page - STMicroelectronics

부품명 STM32L552CCT3PTR
상세설명  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU, 165 DMIPS, up to 512 KB Flash memory, 256 KB SRAM, SMPS
PDF  340 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
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STM32L552CCT3PTR 데이터시트(HTML) 47 Page - STMicroelectronics

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STM32L552xx
Functional overview
78
3.9.6
Reset mode
In order to improve the consumption under reset, the I/Os state under and after reset is
“analog state” (the I/O schmitt trigger is disable). In addition, the internal reset pull-up is
deactivated when the reset source is internal.
3.9.7
VBAT operation
The VBAT pin allows the device VBAT domain to be powered from an external battery, an
external supercapacitor, or from VDD when there is no external battery and when an external
Window watchdog
(WWDG)
O
OOO
-
--
--
--
--
SysTick timer
O
O
O
O
-
--
--
--
--
Touch sensing
controller (TSC)
O
OOO
-
--
--
--
--
Random number
generator (RNG)
O(8)
O(8)
--
-
--
--
--
--
CRC calculation
unit
O
OOO
-
--
--
--
--
GPIOs
O
OOO
O
OO
O
(9)
5
pins
(10)
(11)
5
pins
(10)
-
1. Legend: Y = yes (enable). O = optional (disable by default, can be enabled by software). - = not available.
Gray cells highlight the wakeup capability in each mode.
2. The Flash can be configured in Power-down mode. By default, it is not in Power-down mode.
3. The SRAM clock can be gated on or off.
4. 4 Kbytes or full SRAM2 content is preserved depending on RRS[1:0] bits configuration in PWR_CR3 register.
5. Some peripherals with wakeup from Stop capability can request HSI16 to be enabled. In this case, HSI16 is woken up by
the peripheral, and only feeds the peripheral which requested it. HSI16 is automatically put off when the peripheral does not
need it anymore.
6. UART and LPUART reception is functional in Stop mode, and generates a wakeup interrupt on Start, address match or
received frame event.
7. I2C address detection is functional in Stop mode, and generates a wakeup interrupt in case of address match.
8. Voltage scaling ranges 0 and 1 only.
9. I/Os can be configured with internal pull-up, pull-down or floating in Standby mode.
10. The I/Os with wakeup from standby/shutdown capability are: PA0, PC13, PE6, PA2, PC5.
11. I/Os can be configured with internal pull-up, pull-down or floating in Shutdown mode but the configuration is lost when
exiting the Shutdown mode.
Table 11. Functionalities depending on the working mode(1) (continued)
Peripheral
Run
Sleep
Low-
power
run
Low-
power
sleep
Stop 0/1
Stop 2
Standby Shutdown
VBAT
-
-
-
-



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