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STM32L552CCT3PTR 데이터시트(PDF) 74 Page - STMicroelectronics

부품명 STM32L552CCT3PTR
상세설명  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU, 165 DMIPS, up to 512 KB Flash memory, 256 KB SRAM, SMPS
PDF  340 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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STM32L552CCT3PTR 데이터시트(HTML) 74 Page - STMicroelectronics

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Functional overview
STM32L552xx
74/340
DS12737 Rev 6
3.34
Universal synchronous/asynchronous receiver transmitter
(USART)
The devices have three embedded universal synchronous receiver transmitters (USART1,
USART2 and USART3) and two universal asynchronous receiver transmitters (UART4,
UART5).
These interfaces provide asynchronous communication, IrDA SIR ENDEC support,
multiprocessor communication mode, single-wire half-duplex communication mode and
have LIN master/slave capability. They provide hardware management of the CTS and RTS
signals, and RS485 driver enable. They are able to communicate at speeds of up to
10 Mbit/s.
The USART1, USART2 and USART3 also provide a Smartcard mode (ISO 7816 compliant)
and an SPI-like communication capability.
All USART have a clock domain independent from the CPU clock, allowing the USARTx
(x=1,2,3,4,5) to wake up the MCU from Stop mode using baudrates up to 200 Kbaud. The
wake up events from Stop mode are programmable and can be:
•
Start bit detection
•
Any received data frame
•
A specific programmed data frame
All USART interfaces can be served by the DMA controller.
Table 18. USART/UART/LPUART features
USART modes/features(1)
USART1 USART2 USART3 UART4
UART5
LPUART1
Hardware flow control for modem
XXXXX
X
Continuous communication using DMA
XXXXX
X
Multiprocessor communication
XXXXX
X
Synchronous mode
X
X
X
-
-
-
Smartcard mode
X
X
X
-
-
-
Single-wire half-duplex communication
XXXXX
X
IrDA SIR ENDEC block
XXXXX
-
LIN mode
XXXXX
-
Dual clock domain
XXXXX
X
Wakeup from Stop 0 / Stop 1 modes
XXXXX
X
Wakeup from Stop 2 mode
-----
X
Receiver timeout interrupt
XXXXX
-
Modbus communication
XXXXX
-
Auto baud rate detection
X (4 modes)
-
Driver enable
XXXXX
X
LPUART/USART data length
7, 8 and 9 bits
1. X = supported.



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