STM32WLE4JC datasheet(133/145 Pages) STMICROELECTRONICS

133 / 145 page

DS13105 Rev 8

133/145

STM32WLE5/E4xx

Electrical characteristics

133

JTAG/SWD characteristics

Unless otherwise specified, the parameters given in the table below are derived from tests

performed under the ambient temperature, fPCLKx frequency and supply voltage conditions

summarized in Table 25: General operating conditions, with the following configuration:

•

capacitive load C = 30 pF

•

measurement done at CMOS levels: 0.5 x VDD.

Refer to Section 5.3.16: I/O port characteristics for more details.

Table 93. Dynamic JTAG characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fPP

1/tc(TCK)

TCK clock frequency

2.7 V < VDD < 3.6 V

MHz

1.8 V < VDD < 3.6 V

tisu(TMS)

TMS input setup time

0.5

tih(TMS)

TMS input hold time

tisu(TDI)

TDI input setup time

tih(TDI)

TDI input hold time

2.5

tov(TDO)

TDO output valid time

2.7 V < VDD < 3.6 V

1.8 V< VDD < 3.6 V

toh(TDO)

TDO output hold time

Table 94. Dynamic SWD characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fPP

1/tc(SWCLK)

SWCLK clock frequency

2.7 V < VDD < 3.6 V

MHz

1.8 < VDD < 3.6 V

tisu(SWDIO) SWDIO input setup time

tih(SWDIO) SWDIO input hold time

tov(SWDIO) SWDIO output valid time

2.7 V < VDD < 3.6 V

1.8 V < VDD < 3.6 V

toh(SWDIO) SWDIO output hold time

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