STM32WLE4JC datasheet(36/145 Pages) STMICROELECTRONICS

36 / 145 page

Functional overview

STM32WLE5/E4xx

36/145

DS13105 Rev 8

•

The I2Cs clocks are derived (selected by software) from one of the following sources:

–

system clock (SYSCLK) (only available in Run mode)

–

HSI16 clock (available in Run and Stop modes)

–

APB clock (PCLK depending on which APB the I2C is mapped) (available in CRun

and CSleep when also enabled in I2CxSMEN.)

The wakeup from Stop mode is supported only when the clock is HSI16.

•

The SPI2S2 I2S clock is derived (selected by software) from one of the following

sources:

–

HSI16 clock (only available in Run mode)

–

PLL VCO (PLLQCLK) (only available in Run mode)

–

external input I2S_CK (available in Run and Stop modes)

•

The low-power timers (LPTIMx) clock is derived (selected by software) from one of the

following sources:

–

LSI clock (available in Run and Stop modes)

–

LSE clock (available in Run and Stop modes)

–

HSI16 clock (only available in Run mode)

–

APB clock (PCLK depending on which APB the LPTIMx is mapped) (available in

Run and CStop when enabled in LPTIMxSMEN.)

–

external clock mapped on LPTIMx_IN1 (available in Run and Stop modes)

The functionality in Stop mode (including wakeup) is supported only when the clock is

LSI or LSE, or in external clock mode.

•

The RTC clock is derived (selected by software) from one of the following sources:

–

LSE clock

–

LSI clock

–

HSE32 clock divided by 32

The functionality in Stop mode (including wakeup) is supported only when the clock is

LSI or LSE.

•

The IWDG clock is always the LSI clock.

The RCC feeds the CPU system timer (SysTick) external clock with the AHB clock (HCLK1)

divided by eight. The SysTick can work either with this clock or directly with the CPU clock

(HCLK1), configurable in the SysTick control and status register.

FCLK1 acts as CPU free-running clock. For more details, refer to the programming manual

STM32 Cortex-M4 MCUs and MPUs programming manual (PM0214).

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