STM32WLE4JC datasheet(42/145 Pages) STMICROELECTRONICS

42 / 145 page

Functional overview

STM32WLE5/E4xx

42/145

DS13105 Rev 8

3.21

Comparator (COMP)

The devices embed two rail-to-rail comparators with programmable reference voltage

(internal or external), hysteresis and speed (low speed for low-power) and with selectable

output polarity.

The reference voltage can be one of the following:

•

external I/O

•

internal reference voltage or submultiple (1/4, 1/2, 3/4)

All comparators can wake up from Stop mode, generate interrupts and breaks for the timers,

and can be also combined into a window comparator.

3.22

True random number generator (RNG)

The devices embed a true RNG that delivers 32-bit random numbers generated by an

integrated analog circuitry.

3.23

Advanced encryption standard hardware accelerator (AES)

The AES encrypts or decrypts data, using an algorithm and implementation fully compliant

with the advanced encryption standard (AES) defined in FIPS (federal information

processing standards) publication 197.

Multiple chaining modes are supported (ECB, CBC, CTR, GCM, GMAC, CCM), for key

sizes of 128 or 256 bits. The AES supports DMA single transfers for incoming and outgoing

data (two DMA channels required).

3.24

Public key accelerator (PKA)

The PKA is used to compute cryptographic public key primitives, specifically those related to

RSA (Rivest, Shamir and Adleman), Diffie-Hellmann or ECC (elliptic curve cryptography)

over GF(p) (Galois fields). These operations are executed in the Montgomery domain.

3.25

Timer and watchdog

The devices include one advanced 16-bit timer, one general-purpose 32-bit timer, two 16-bit

basic timers, three low-power timers, two watchdog timers and a SysTick timer.

The table below compares the features of the advanced control, general purpose and basic

timers.

STM32WLE4JC 데이터시트(PDF) 42 Page - STMicroelectronics