STPMIC1 datasheet(75/140 Pages) STMICROELECTRONICS

75 / 140 page

6.3

Control registers

6.3.1

Main control register (MAIN_CR)

Table 25. MAIN_CR

reserved

OCP_OFF_DBG

PWRCTRL_POL

PWRCTRL_EN

RREQ_EN

SWOFF

R/W

Address: 0x10

Type: read/write register

Default: 0x00

Description: main control register. This register is initialized to default values during CHECK&LOAD state.

[7 :5]

Reserved

[4]

OCP_OFF_DBG: Used as software debug bit to emulate OCP turn-OFF event generation. OCP flags coming from any

regulators are bypassed when this bit is set.

0: OCP event is generated based on flags from regulators.

1: OCP turn-OFF event is generated.

[3]

PWRCTRL_POL: specifies PWRCTRL pin polarity

0: PWRCTRL active low

1: PWRCTRL active high

[2]

PWRCTRL_EN: enable PWRCTRL functionality

0: PWRCTRL enable

1: PWRCTRL disable

[1]

RREQ_EN: allows power cycling on turn-OFF condition

0: power cycling is performed only on RSTn assertion by the application processor

1: Power cycling is performed on turn-OFF condition and on RSTn assertion by the application processor

[0]

SWOFF: Software switch OFF bit

0: no effect

1: switch-OFF requested (POWER_DOWN starts immediately)

STPMIC1

Control registers

DS12792 - Rev 7

page 75/140

STPMIC1 데이터시트(PDF) 75 Page - STMicroelectronics

STPMIC1 데이터시트(HTML) 75 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL