| 전자부품 데이터시트 검색엔진 |
|
STPMIC1 데이터시트(PDF) 89 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STPMIC1 데이터시트(HTML) 89 Page - STMicroelectronics |
|
89 / 140 page ![]() 6.4.2 REFDDR MAIN mode control register (REFDDR_MAIN_CR) Table 39. REFDDR_MAIN_CR 7 6 5 4 3 2 1 0 reserved reserved reserved reserved reserved reserved reserved ENA R/W R/W R/W R/W R/W R/W R/W R/W Address: 0x24 Type: read/write register Default: 0x0000000X where X depends on NVM settings Description: REFDDR, MAIN mode control register. Register is initialized in CHECK&LOAD mode. User can write to this register to control the enable of REFDDR applied to MAIN mode. [7 :1] Reserved [0] ENA: VREF_DDR enable bit 0: VREF_DDR is disabled 1: VREF_DDR is enabled STPMIC1 Power supplies control registers DS12792 - Rev 7 page 89/140 |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |